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All articles are available on IEEEXplore.

IEEE Journal of Solid-State Circuits (JSSC)

[1]            Kwuang-Han Chang and Chih-Cheng Hsieh, “A Calibration-Free 13-bit 10-MS/s Full-Analog SAR ADC With Continuous-Time Feedforward Cascaded (CTFC) Op-Amps,” accepted by IEEE Journal of Solid-State Circuits.

2019 IEEE Asian Solid-State Circuits Conference (ASSCC)

[1]            Tzu-Hsiang Hsu, R.-S. Liu, C.-C. Lo, K.-T. Tang, M.-F. Chang, and Chih-Cheng Hsieh, “A 0.5V Real-time Computational CMOS Image Sensor with Programmable Kernel for Always-on Feature Extraction,” accepted by 2019 IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2019.

2019 IEEE Symposia on VLSI Circuits (VLSI Symposia)

[1]            K.-T. Tang, W.-C. Wei, Z.-W. Yeh, T.-H. Hsu, Y.-C. Chiu, C.-X. Xue, Y.-C. Kuo, T.-H. Wen, M.-S. Ho, C.-C. Lo, R.-S. Liu, Chih-Cheng Hsieh and M.-F. Chang, “Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices,” 2019 IEEE Symposia on VLSI Circuits (VLSI Symposia), Jun. 2019.

2019 VLSI Design/CAD Symposium

[1]            Tzu-Hsiang Hsu, Chih-Cheng Hsieh, “A 0.5V Real-time Computational CMOS Image Sensor with Programmable Kernel for Always-on Feature Extraction,” in 2019 VLSI Design/CAD Symposium, Kaohsiung, Taiwan, Aug. 6-9, 2019.

[2]            You-Shin Chen, T.-H. Hsu, C.-W. Chen, Chih-Cheng Hsieh, “A Low Noise Optical Encoder with Background Light Cancellation Using Photodiodes in Series,” in 2019 VLSI Design/CAD Symposium, Kaohsiung, Taiwan, Aug. 6-9, 2019.

[3]            Yi-Hsuan Lin, Chih-Cheng Hsieh, “An Energy-Efficient 12b 20MS/s Time-Interleaved SAR ADC,” in 2019 VLSI Design/CAD Symposium, Kaohsiung, Taiwan, Aug. 6-9, 2019.